Microelectronic devices are fabricated on a semiconductor substrate as integrated circuits in which various conductive layers are interconnected with one another to permit electronic signals to propagate within the device. An example of such a device is a complementary metal-oxide-semiconductor (CMOS) field effect transistor (FET) or MOSFET, including both planar and three-dimensional structures. An example of a three-dimensional structure is a FinFET device.
Over the past decades, the MOSFET has continually been scaled down in size and modern integrated circuits are incorporating MOSFETs with channel lengths of less than 0.1 micron. Devices with a 65 nm feature size (with the channel being even shorter) are currently in production. The decrease in feature size has resulted in certain challenges because small MOSFETs exhibit higher leakage currents, and lower output resistance than larger devices. Still, smaller MOSFETs are desirable for several reasons. The main reason to make transistors smaller is to pack more and more devices in a given chip area, reducing the price per chip. Additionally, the reduction in transistor dimension can help increase the speed.
An exemplary FET or MOSFET includes a gate electrode on a gate dielectric layer on a surface of a semiconductor substrate. Source/drain regions are provided along opposite sides of the gate electrode. The source and drain regions are heavily doped regions of the semiconductor substrate. Usually a silicide layer, for example, nickel silicide is used to couple contacts in an interlayer dielectric to the source and drain regions. Sidewall spacers are disposed on laterally opposite sidewalls of the gate electrode.
Because of small MOSFET geometries, voltage that can be applied to a gate electrode is be reduced to maintain reliability. To maintain performance, the threshold voltage of the MOSFET is reduced as well. As threshold voltage is reduced, the transistor cannot be switched from complete turn-off to complete turn-on with the limited voltage swing available. Subthreshold leakage, which was ignored in the past, now can have a significant impact on device performance.
Low-k spacer materials are used in integration of gate electrodes. Low-k spacer materials minimize undesirable properties such as resistance-capacitance (RC) delay, parasitic capacitance, power dissipation, and cross-talk. Traditional low-k spacers are based on silicon starting with the oxide (k=3.9), which achieve reduction of ‘k’ by incorporating other elements such as fluorine (F) (SiOF, k˜3.7) and carbon (C) (SiOC, k˜2.8). Other low-k spacers incorporate polymers into the system or induce porosity (air gap, k=1) in the structure resulting in aero and xerogels (k as low as 1.8). Many of these low-k materials are subject to failure due to, for example, poor mechanical strength, poor thermal stability, and integration challenges.
There is a need for low-k spacer materials that provide mechanical strength and good thermal stability.